• Our paper titled “Nona: Accurate Power Prediction Model Using Neural Networks” is accepted by ACM/IEEE Design Automation Conference (DAC) 2024. Congrats, Hosun, Chanho, and Euijun!
• William receives a Teaching Excellence Award from the College of Engineering, Yonsei University, in Apr. 2024.
• Jingu has successfully defended his master’s thesis titled “Dynamic Wear Leveling Techniques for Enhancing Lifetime of PE Arrays in DNN Accelerator.” Congrats, and wish you all the success in the future.
• Our paper titled “NeuroSpector: Systematic Optimization of Dataflow Scheduling in DNN Accelerators” is accepted by IEEE Transactions on Parallel and Distributed Systems (TPDS). Well done, Chanho and Bogil!
• Our paper titled “LAS: Locality-Aware Scheduling for GEMM-Accelerated Convolutions in GPUs” is accepted by IEEE Transactions on Parallel and Distributed Systems (TPDS). Congrats, Hyeonjin!
• Jeongmin, Semin, and Suan have successfully defended their MS theses. Congratulations, and wish you the best in your future career paths.
• Our paper titled “NOMAD: Enabling Non-blocking OS-managed DRAM Cache via Tag-Data Decoupling” is accepted by IEEE International Symposium on High-Performance Computer Architecture (HPCA) 2023. Congrats, Youngin and Hyeonjin!
• A paper titled “SnakeByte: A TLB Design with Adaptive and Recursive Page Merging in GPUs” is accepted by IEEE International Symposium on Computer Architecture (HPCA) 2023. Kudos to all authors!
• William receives a Teaching Excellence Award from the College of Engineering, Yonsei University, in Apr. 2022.
• Our white paper titled “NPUsim: Full-System, Cycle-Accurate, Functional Simulations of Deep Neural Network Accelerators” is accepted by the US DOE Workshop on Modeling and Simulation of Systems and Applications (ModSim) 2021. Congrats, Bogil!
• Our paper titled “Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices” is accepted for publication at IEEE Access. Congrats, Bogil and Sungjae!
• A paper titled “Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices” is accepted to IEEE/ACM International Symposium on Code Generation and Optimization (CGO) 2021.
• A paper titled “The Nebula Benchmark Suite: Implications of Lightweight Neural Networks” got accepted by IEEE Transactions on Computers (TC). Kudos to Bogil and co-authors.
• Our paper titled “Duplo: Lifting Redundant Memory Accesses of Deep Neural Networks for GPU Tensor Cores” is accepted by IEEE/ACM International Symposium on Microarchitecture (MICRO) 2020. Congrats, Hyeonjin!

 

Our lab is looking for highly self-motivated and brilliant students broadly interested in computer architecture and systems, including but not limited to:

• Neural accelerators
• Memory systems
• Processing in/near memory
• GPU microarchitecture
• Power, thermal, and reliability management

 

The following courses are relevant to our research interests. Students looking for lab opportunities are recommended to take these courses (but not required to take all of them). Strong programming skills are mandatory, e.g., C++, Python, Perl, Verilog. A good candidate should have a minimum GPA of 3.5/4.3, or otherwise the applicant must prove competence.

• EEE3530 or CSI3102 Computer Architecture
• EEE3535 or CSI3101 Operating Systems
• EEE3540 Microprocessors
• EEE3544 System IC Design
• EEE3314 or CSI4108 Artificial Intelligence
• EEE5501 Advanced Programming
• EEE6504 or CSI4104 Compilers
• EEE6510 or CSI6532 Advanced Computer Architecture

 

Eligibility: Applicants interested in joining the lab must have legal residence in South Korea prior to contacting the lab. Please, do not send us emails unless you are legally present in South Korea.

 

Contact: William J. Song (Office: Engineering Building #3, C410, Email: wjhsong {\at} yonsei {\dot} ac {\dot} kr, Phone: 2123-2864)