Publications

H. Kim, T. Lim, and W. Song, “Graphite: Hardware-Aware GNN Reshaping for Acceleration with GPU Tensor Cores,” IEEE Transactions on Parallel and Distributed Systems (TPDS), Mar. 2025.
T. Lim, H. Kim, J. Park, B. Kim, and W. Song, “RoTA: Rotational Torus Accelerator for Wear Leveling of Neural Processing Elements,” Design, Automation and Test in Europe Conference and Exhibition (DATE), Mar. 2025.
Y. Kim and W. Song, “Genie Cache: Non-blocking Miss Handling and Replacement in Page-Table-based DRAM Cache,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov. 2024, pp. 983-996.
H. Choi, C. Park, E. Kim, and W. Song, “Nona: Accurate Power Prediction Model Using Neural Networks,” ACM/IEEE Design Automation Conference (DAC), no. 38, June 2024, pp. 1-6.
C. Park, B. Kim, S. Ryu, and W. Song, “NeuroSpector: Systematic Optimization of Dataflow Scheduling in DNN Accelerators,” IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 34, no. 8, Aug. 2023, pp. 2279-2294.
H. Kim and W. Song, “LAS: Locality-Aware Scheduling for GEMM-Accelerated Convolutions in GPUs,” IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 34, no. 5, May 2023, pp. 1479-1494.
Y. Kim, H. Kim, and W. Song, “NOMAD: Enabling Non-blocking OS-Managed DRAM Cache via Tag-Data Decoupling,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023, pp. 193-205.
J. Lee, J. Lee, Y. Oh, W. Song, and W. Ro, “SnakeByte: A TLB Design with Adaptive and Recursive Page Merging in GPUs,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023, pp. 1195-1207.
B. Kim, S. Lee, C. Park, H. Kim, and W. Song, “The Nebula Benchmark Suite: Implications of Lightweight Neural Networks,” IEEE Transactions on Computers (TC), vol. 70, no. 11, Nov. 2021, pp. 1887-1900.
W. Song, “Hardware Accelerator Systems for Embedded Systems,” Hardware Accelerator Systems for Artificial Intelligence and Machine Learning, Elsevier Advances in Computers, vol. 122, Mar. 2021, pp. 23-49.
C. Kim, S. Jeong, S. Cho, Y. Lee, W. Song, Y. Kim, and H. Kim, “Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices,” International Symposium on Code Generation and Optimization (CGO), Mar. 2021, pp. 327-339.
B. Kim, S. Lee, A. Trivedi, W. Song, “Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices,” IEEE Access, vol. 8, Nov. 2020, pp. 216259-216270.
H. Kim, S. Ahn, Y. Oh, B. Kim, W. Ro, and W. Song, “Duplo: Lifting Redundant Memory Accesses of Deep Neural Networks for GPU Tensor Cores,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2020, pp. 725-737.
Y. Oh, M. Yoon, W. Song, and W. Ro, “FineReg: Fine-Grained Register File Management for Augmenting GPU Throughput,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2018, pp. 364-379.

Patents

W. Song, Y. Kim, and H. Kim, “DRAM Cache System and Operating Method of the Same,” Application #US18/627,459, Apr. 2024.
W. Song and H. Kim, “Neural Network Accelerator and Method of Controlling Same,” Application #US18/435,422, Feb. 2024.
W. Song, B. Kim, C. Park, S. Koong, and T. Lim, “Deep Neural Network Accelerator for Optimized Data Processing and Control Method of the Deep Neural Network Accelerator,” Application #US18/127,875, Mar. 2023; Publication #US12,124,879, Oct. 2024.
W. Song, C. Park, B. Kim, and S. Ryu, “Neural Network Computing Device and Control Method Thereof,” Application #US17/883,010, Aug. 2022.
W. Song, W. Ro, H. Kim, S. Ahn, Y. Oh, and B. Kim, “Operation Device of Convolutional Neural Network, Operation Method of Convolutional Neural Network and Computer Program Stored in A Recording Medium to Execute the Method Thereof,” Application #US17/752,235, May 2022.
S. O, W. Ro, W. Song, and J. Lee, “Controller, Computing System including the Same, and Method of Creating and Searching Page Table Entry for the Same,” Application #US17/526,391, Nov. 2021; Publication #US11,860,793, Jan. 2024.

Workshops, Tutorials, and More

T. Lim, H. Kim, J. Park, B. Kim, and W. Song, “Wear Leveling of Processing Elements Array in Deep Neural Network Accelerators,” Design Automation Conference (DAC) – Work in Progress, July 2023.
C. Park, S. Koong, B. Kim, T. Lim, and W. Song, “Fornax: Lightweight Energy-Efficient DNN Accelerator Architecture for Edge Devices,” Design Automation Conference (DAC) – Work in Progress, July 2023.
B. Kim, C. Park, T. Lim, and W. Song, “NPUsim: Full-System, Cycle-Accurate, Functional Simulations of Deep Neural Network Accelerators,” Workshop on Modeling and Simulation of Systems and Applications, Oct. 2021.
W. Song, “Deep Learning Hardware Acceleration: Current Trends and Future Directions,” SK Hynix, Oct. 2020.
B. Kim, S. Lee, and W. Song, “Nebula: Lightweight Neural Network Benchmarks,” Workshop on Modeling and Simulation of Systems and Applications, Aug. 2020.
W. Song, “NPUsim: Cycle-Accurate Architecture Simulation Framework for Neural Network Accelerators,” Samsung Advanced Institute of Technology, Jan. 2020.

Software Copyrights

C. Park, B. Kim, and S. Ryu, and W. Song, “NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators,” Korea Copyright Commission C-2025-010190, Mar. 2025.
S. Jung, Y. Chon, J. Hwang, and W. Song, “RelSim: Computational Framework for Lifetime Reliability Modeling of Heterogeneous Accelerator Systems,” Korea Copyright Commission C-2022-054360, Dec. 2022.
B. Kim, S. Lee, C. Park, H. Kim, and W. Song, “Nebula: Lightweight Neural Network Benchmarks,” Korea Copyright Commission C-2021-014465, Mar. 2021.