Publications

T. Lim, H. Kim, J. Park, B. Kim, and W. Song, “RoTA: Rotational Torus Accelerator for Wear Leveling of Neural Processing Elements,” Design, Automation and Test in Europe Conference (DATE), Mar. 2025.
Y. Kim and W. Song, “Genie Cache: Non-blocking Miss Handling and Replacement in Page-Table-based DRAM Cache,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov. 2024, pp. 983-996.
H. Choi, C. Park, E. Kim, and W. Song, “Nona: Accurate Power Prediction Model Using Neural Networks,” ACM/IEEE Design Automation Conference (DAC), no. 38, June 2024, pp. 1-6.
C. Park, B. Kim, S. Ryu, and W. Song, “NeuroSpector: Systematic Optimization of Dataflow Scheduling in DNN Accelerators,” IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 34, no. 8, Aug. 2023, pp. 2279-2294.
H. Kim and W. Song, “LAS: Locality-Aware Scheduling for GEMM-Accelerated Convolutions in GPUs,” IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 34, no. 5, May 2023, pp. 1479-1494.
Y. Kim, H. Kim, and W. Song, “NOMAD: Enabling Non-blocking OS-Managed DRAM Cache via Tag-Data Decoupling,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023, pp. 193-205.
J. Lee, J. Lee, Y. Oh, W. Song, and W. Ro, “SnakeByte: A TLB Design with Adaptive and Recursive Page Merging in GPUs,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023, pp. 1195-1207.
B. Kim, S. Lee, C. Park, H. Kim, and W. Song, “The Nebula Benchmark Suite: Implications of Lightweight Neural Networks,” IEEE Transactions on Computers (TC), vol. 70, no. 11, Nov. 2021, pp. 1887-1900.
W. Song, “Hardware Accelerator Systems for Embedded Systems,” Hardware Accelerator Systems for Artificial Intelligence and Machine Learning, Elsevier Advances in Computers, vol. 122, Mar. 2021, pp. 23-49.
C. Kim, S. Jeong, S. Cho, Y. Lee, W. Song, Y. Kim, and H. Kim, “Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices,” International Symposium on Code Generation and Optimization (CGO), Mar. 2021, pp. 327-339.
B. Kim, S. Lee, A. Trivedi, W. Song, “Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices,” IEEE Access, vol. 8, Nov. 2020, pp. 216259-216270.
H. Kim, S. Ahn, Y. Oh, B. Kim, W. Ro, and W. Song, “Duplo: Lifting Redundant Memory Accesses of Deep Neural Networks for GPU Tensor Cores,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2020, pp. 725-737.
Y. Oh, M. Yoon, W. Song, and W. Ro, “FineReg: Fine-Grained Register File Management for Augmenting GPU Throughput,” IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2018, pp. 364-379.
W. Song, A. Buyuktosunoglu, C. Cher, and P. Bose, “Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2016, pp. 284-289.
S. Hassan, W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Reliability-Performance Tradeoff Between 2.5D and 3D-Stacked DRAM Processors,” IEEE International Reliability Physics Symposium (IRPS), Apr. 2016, pp. MY2.1-6.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Amdahl’s Law for Lifetime Reliability Scaling in Heterogeneous Multicore Processors,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), Mar. 2016, pp. 594-605.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “KitFox: Multi-Physics Libraries for Integrated Power, Thermal, and Reliability Simulations of Multicore Microarchitecture,” IEEE Transactions on Components, Packaging, and Manufacturing Technology (TCPMT), vol. 5, no. 11, Oct. 2015, pp. 1590-1601.
K. Rao, W. Song, S. Yalamanchili, and Y. Wardi, “Temperature Regulation in Multicore Processors Using Adjustable-Gain Integral Controllers,” IEEE Conference on Control Applications (CCA), Sep. 2015, pp. 810-815.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Architectural Reliability: Lifetime Reliability Characterization and Management of Many-Core Processors,” IEEE Computer Architecture Letters (CAL), vol. 14, no. 2, pp. 103-106, July 2015.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Managing Performance-Reliability Tradeoffs in Multicore Processors,” IEEE International Reliability Physics Symposium (IRPS), Apr. 2015, pp. 3C.1.1-7. (Best Student Paper Award)
B. Alexandrov, O. Sullivan, W. Song, S. Yalamanchili, S. Kumar, and S. Mukhopadhyay, “Control Principles and On-Chip Circuits for Active Cooling Using Integrated Super Lattice-based Thin-Film Thermoelectric Devices,” IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), vol. 22, no. 9, Sept. 2014, pp. 1909-1919.
J. Lim, N. Lakshminarayana, H. Kim, W. Song, S. Yalamanchili, and W. Sung, “Power Modeling of GPU Architecture Using McPAT,” ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 19, no. 3, June 2014, pp. 26:1-24.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Energy Introspector: A Parallel, Composable Framework for Integrated Power-Reliability-Thermal Modeling for Multicore Architectures,” IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar. 2014, pp. 143-144.
J. Wang, J. Beu, R. Behda, T. Conte, Z. Dong, C. Kersey, M. Rasquinha, G. Riley, W. Song, H. Xiao, P. Xu, and S. Yalamanchili, “Manifold: A Parallel Simulation Framework for Multicore Systems,” IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar. 2014, pp. 106-115.
M. Cho, K. Ahmed, W. Song, S. Yalamanchili, and S. Mukhopadhyay, “Post-Silicon Characterization and On-Chip Prediction of Transient Thermal Field in Integrated Circuits Using Thermal System Identification,” IEEE Transactions on Components, Packaging, and Manufacturing Technology (TCPMT), vol. 4, no. 1, Jan. 2014, pp. 37-45.
J. Chung, D. Lee, W. Song, S. Choi, C. Lim, T. Yeoum, “Enhancements to FPMIPv6 for Improved Seamless Vertical Handover Between LTE and Heterogeneous Access Networks,” IEEE Wireless Communications Magazine, vol. 20, no. 3, June 2013, pp. 112-119.
N. Almoosa, W. Song, Y. Wardi, and S. Yalamanchili, “Throughput Regulation in Multicore Processors via IPA,” IEEE Conference on Decision and Control (CDC), Dec. 2012, pp. 7267-7272.
N. Almoosa, W. Song, Y. Wardi, and S. Yalamanchili, “A Power Capping Controller for Multicore Processors,” American Control Conference (ACC), June 2012, pp. 4709-4714.
W. Song, S. Yalamanchili, S. Mukhopadhyay, and A. Rodrigues, “Instruction-Based Energy Estimation Methodology for Asymmetric Many-Core Processor Simulations,” International ICST Conference on Simulation Tools and Techniques (SIMUTools), Mar. 2012, pp. 166-171.
M. Cho, W. Song, S. Yalamanchili, and S. Mukhopadhyay, “Thermal System Identification (TSI): A Methodology for Post-Silicon Characterization and Prediction of the Transient Thermal Field in Many-Core Chips,” IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), Mar. 2012, pp. 118-124.
M. Hsieh, K. Thompson, W. Song, A. Rodrigues, and R. Riesen, “SST: A Scalable Parallel Framework for Architecture-Level Performance, Power, Area, and Thermal Simulation,” The Computer Journal, vol. 55, no. 2, Feb. 2012, pp. 181-191.
M. Hsieh, K. Thompson, W. Song, A. Rodrigues, and R. Riesen, “A Framework for Architecture-Level Power, Area, Thermal Simulation and Its Application to Network-on-Chip Design Exploration,” ACM SIGMETRICS Performance Evaluation Review, vol. 38, no. 4, Mar. 2011, pp. 63-68.
W. Song, J. Chung, D. Lee, C. Lim, and S. Choi, “Improvements to Seamless Vertical Handover Between Mobile WiMAX and 3GPP UTRAN Through the Evolved Packet Core,” IEEE Communications Magazine, vol. 47, no. 4, Apr. 2009, pp. 66-73.

Patents

W. Song, Y. Kim, and H. Kim, “DRAM Cache System and Operating Method of the Same,” Application #US18/627,459, Apr. 2024.
W. Song and H. Kim, “Neural Network Accelerator and Method of Controlling Same,” Application #US18/435,422, Feb. 2024.
W. Song, B. Kim, C. Park, S. Koong, and T. Lim, “Deep Neural Network Accelerator for Optimized Data Processing and Control Method of the Deep Neural Network Accelerator,” Application #US18/127,875, Mar. 2023; Publication #US12124879, Oct. 2024.
W. Song, C. Park, B. Kim, and S. Ryu, “Neural Network Computing Device and Control Method Thereof,” Application #US17/883,010, Aug. 2022.
W. Song, W. Ro, H. Kim, S. Ahn, Y. Oh, and B. Kim, “Operation Device of Convolutional Neural Network, Operation Method of Convolutional Neural Network and Computer Program Stored in A Recording Medium to Execute the Method Thereof,” Application #US17/752,235, May 2022.
S. O, W. Ro, W. Song, and J. Lee, “Controller, Computing System including the Same, and Method of Creating and Searching Page Table Entry for the Same,” Application #US17/526,391, Nov. 2021; Publication #US11860793, Jan. 2024.
R. Monfort, P. Bose, A. Buyuktosunoglu, C.-Y. Cher, H. Jacobson, W. Song, K. Swaminathan, A. Vega, and L. Wang, “Optimization of Application Workflow in Mobile Embedded Devices,” Application #US14/950,934, Nov. 2015; Publication #US10635490, Apr. 2020.
R. Monfort, P. Bose, A. Buyuktosunoglu, C.-Y. Cher, H. Jacobson, W. Song, K. Swaminathan, A. Vega, and L. Wang, “Optimization of Application Workflow in Mobile Embedded Devices,” Application #US14/753,685, June 2015; Publication #US9690555, June 2017.
C. Lim, T. Yeoum, S. Choi, J. Chung, W. Song, and D. Lee, “Data Forwarding Method and System for Vertical Handover,” Application #US13/127,095, Oct. 2009; Publication #US9078183, July 2015.

Workshops, Tutorials, and More

T. Lim, H. Kim, J. Park, B. Kim, and W. Song, “Wear Leveling of Processing Elements Array in Deep Neural Network Accelerators,” Design Automation Conference (DAC) – Work in Progress, July 2023.
C. Park, S. Koong, B. Kim, T. Lim, and W. Song, “Fornax: Lightweight Energy-Efficient DNN Accelerator Architecture for Edge Devices,” Design Automation Conference (DAC) – Work in Progress, July 2023.
B. Kim, C. Park, T. Lim, and W. Song, “NPUsim: Full-System, Cycle-Accurate, Functional Simulations of Deep Neural Network Accelerators,” Workshop on Modeling and Simulation of Systems and Applications, Oct. 2021.
W. Song, “Deep Learning Hardware Acceleration: Current Trends and Future Directions,” SK Hynix, Oct. 2020.
B. Kim, S. Lee, and W. Song, “Nebula: Lightweight Neural Network Benchmarks,” Workshop on Modeling and Simulation of Systems and Applications, Aug. 2020.
W. Song, “NPUsim: Cycle-Accurate Architecture Simulation Framework for Neural Network Accelerators,” Samsung Advanced Institute of Technology, Jan. 2020.
W. Song, S. Mukhopadhyay, A. Rodrigues, and S. Yalamanchili, “Energy Introspector: Standard Physical Library Interface for Full-System Microarchitecture and Multi-Physics Simulations,” Workshop on Modeling and Simulation of Systems and Applications, Aug. 2014.
J. Wang, R. Behda, T. Conte, C. Kersey, G. Riley, W. Song, H. Xiao, and S. Yalamanchili, “Manifold: Modeling and Parallel Simulation of Multicore Systems with Manifold,” Tutorial at HPCA, Feb. 2014.
J. Wang, R. Behda, T. Conte, C. Kersey, G. Riley, W. Song, H. Xiao, and S. Yalamanchili, “Manifold: Modeling and Parallel Simulation of Multicore Systems with Manifold,” Tutorial at MICRO, Dec. 2013.
W. Song, S. Mukhopadhyay, and S. Yalamanchili, “Reliability Implications of Power and Thermal-Constrained Operations in Asymmetric Multicore Processors,” Dark Silicon Workshop at ISCA, June 2012.

Software Copyrights

S. Jung, Y. Chon, J. Hwang, and W. Song, “RelSim: Computational Framework for Lifetime Reliability Modeling of Heterogeneous Accelerator Systems,” Korea Copyright Commission C-2022-054360, Dec. 2022.
B. Kim, S. Lee, C. Park, H. Kim, and W. Song, “Nebula: Lightweight Neural Network Benchmarks,” Korea Copyright Commission C-2021-014465, Mar. 2021.